The SST49LF160C flash memory device is designed to interface with host controllers (chipsets) that support a lowpin-count (LPC) interface for system firmware applications. The SST49LF160C device complies with the LPC Interface Specification. The LPC interface operates with 5 signal pins versus 32 pins of a 8-bit parallel flash memory. This frees up pins on the ASIC host controller resulting in lower ASIC costs and a reduction in overall system costs due to simplified signal routing.
The SST49LF160C uses a 5-signal LPC interface to support both in-system and rapid factory programming using programmer equipment. A high voltage pin (WP#/AAI) is used to enable Auto Address Increment (AAI) mode. The SST49LF160C offers hardware block protection in addition to individual block protection via software registers for critical system code and data. A 256-bit Security ID space with a 64-bit factory pre-programmed unique number and a 192-bit user programmable OTP area enhances the user’s ability to use new security techniques and implement a new data protection scheme. The SST49LF160C also provides general purpose inputs (GPI) for system design flexibility.
The SST49LF160C flash memory device is manufactured with SST’s proprietary, high-performance SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector attain greater reliability and manufacturability compared with alternative technology approaches. The SST49LF160C device significantly improves performance and reliability, while lowering power consumption. The SST49LF160C device writes (Program or Erase) in-system with a single 3.0-3.6V power supply. It uses less energy during Erase and Program than alternative flash memory technologies.
The total energy consumed is a function of the applied voltage, current and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash memory technologies.
The SuperFlash technology provides fixed Erase and Program time, independent of the number of Erase/Program cycles that have performed. Therefore the system software or hardware does not have to be calibrated or correlated to the cumulative number of erase cycles as is necessary with alternative flash memory technologies, whose Erase and Program time increase with accumulated Erase/Program cycles. To protect against inadvertent write, the SST49LF160C device has on-chip hardware and software write protection schemes. It is offered with a typical endurance of 100,000 cycles. Data retention is rated at greater than 100 years.
The SST49LF160C product provides a maximum program time of 10 ìs per byte with a single-byte Program operation; effectively 5 ìs per byte with a dual-byte Program operation and 2.5 ìs per byte with a quad-byte Program operation. End-of-Write can be detected by the RY/BY# pin output in AAI mode and by reading the software status register during an in-system Program or Erase operation.
The SST49LF160C is offered in a 32-PLCC lead-free package to address the growing need for non-Pb solutions in electronic components. Non-Pb package versions can be obtained by ordering products with a package code suffix of “E” as the environmental attribute in the product part number.